1. Field of the Invention
The present invention relates to processes that improve transmission properties of optical systems, and more particularly to a system and method for reducing surface roughness and providing an optical quality silicon surface in optical devices, including integrated optical waveguide device structures.
2. Discussion of the Related Art
As optical system architectures have matured, the use of innovative and cost-effective packaging of optoelectronic components has migrated from relatively simple laser and photodetector submounts to more sophisticated hybrid integrated optical subsystems. This is fuelled by the emergence and maturity of the optical layer and the requirement for increased optical layer functionality. Simultaneously, the gradual migration of optical devices to the edge of the network and ultimately to the individual user, requires the implementations of small, low-cost and highly functional optoelectronic components.
Silicon optical bench (SiOB) technology was developed to take advantage of planar lightwave circuit devices using glass-on-silicon technology. SiOB technology also takes advantage of silicon processing for realizing V-grooves, fiducial and alignment marks, mechanical rails for passive alignment, solder dams and solder evaporation, etc. However, the presence of large buffer layers on silicon and weak optical waveguiding in the SiOB technology result in large bend radii. Thus, large real estate is required for lightwave circuit devices.
Silicon-on-insulator (SOI) was then developed as a promising substrate material for the realization of integrated optical devices, including optical waveguide device structures. SOI has recently emerged as a commercially viable, low-cost, integrated optical waveguide technology. Examples of technology using SOI are disclosed in U.S. Pat. Nos. 4,789,642, 5,787,214 and 4,789,691. SOI provides a readily available planar waveguide solution that is advantageous due to the availability of silicon substrates being directly compatible with other silicon processing. Silicon may be used as an optical bench to realize fiducials, alignment marks and passive grooves for hybrid assembly of active devices, and optical fibers with passive waveguide structures on SOI.
To define optical devices and other alignment structures that utilize SOI as the substrate material, there are two possible approaches with the existing technology: a wet etching technique and a dry etching technique. Wet etching typically deals with etching done utilizing a liquid etch, such as buffered oxide etches. Dry etching typically is performed in a reactive gas and/or plasma discharge gas environment. Each of these etching techniques has its attributes. In general, they are used in specific situations for which they are best suited. While wet etching may be used to obtain optically smooth surfaces, it tends to be preferential along crystallographic planes. Furthermore, wet etching provides an isotropic etch without sufficient flexibility in the optical device structures, and in particular for realizing deep aspect ratio structures. As a result, wet etching usually yields non-vertical etched walls, a wall with a curved surface, or an unacceptably small vertical to horizontal etched aspect ratio. Therefore, wet etching is generally not appropriate for applications such as forming waveguides in optical devices or forming other structures where vertical walls and/or high aspect ratios are required.
On the other hand, dry etching is often used for applications in which wet etching is not appropriate, e.g., applications where a vertical wall with a high aspect ratio is required, such as forming waveguides in optical devices. Two commonly used dry etch techniques are regular dry etching and deep reactive-ion-etching (RIE). Due to its highly anisotropic etching, dry etching is very advantageous for realizing flexible optical device structures with deep aspect ratios. However, dry etching introduces surface roughness that causes significant optical loss. Because of the very large refractive index difference between the silicon waveguide core and the cladding, e.g., air or other dielectric material, silicon surface roughness can produce significant optical loss. Moreover, light beams processed in an integrated optical component typically propagate in a direction parallel to the surface of the substrate. To avoid distortion of the propagating light with an associated loss of information, it is often necessary that the walls of optical devices in the integrated component be essentially vertical and smooth. Therefore, there is a need for a system and method to reduce surface roughness of the silicon surface on structures with high aspect ratio topographic features, so that the transmission properties of waveguides and waveguide facets formed by dry etching are improved.